A NAND gate outputs false only when both inputs are true; otherwise, it outputs true.

A NAND gate outputs 1 when at least one input is low; thus, it outputs 1 when both inputs are low.

A NOR gate outputs 0 if at least one input is 1.

A NOR gate outputs false (0) when any of its inputs are true (1).

The output of a NOT gate is 1 when the input is 0.

A NOT gate inverts the input; thus, if the input is 1, the output is 0.

A NOT gate inverts the input; if the input is false, the output is true.

Shifting '1011' left by 1 position results in '10110'.

An AND gate outputs 1 only when both inputs are 1.

An AND gate outputs true only when both inputs are true.

An AND gate outputs 1 only when both inputs are high (1).

An Ex-NOR gate outputs 1 when both inputs are the same, so for A=1 and B=1, the output is 1.

An Ex-NOR gate outputs 1 when both inputs are the same.

The Ex-OR gate outputs 0 when both inputs are the same, so for A=1 and B=1, the output is 0.

An Ex-OR gate outputs 0 when both inputs are the same (either 0 or 1).

The output of an OR gate is 0 if both inputs are 0.

An OR gate outputs false only when both inputs are false.

An XOR gate outputs 0 when both inputs are high.

The output of A XOR A is always 0.

The output of a D Flip-Flop will be 0 when the D input is 0 at the clock edge.

The output state of a D flip-flop will be low when the D input is low at the clock edge.

CMOS logic consumes significantly less power than TTL logic, especially when in a static state.

CMOS logic consumes significantly less power than TTL logic, especially when in a static state.

The primary advantage of using a PLD is the flexibility to change logic functions after manufacturing, allowing for rapid prototyping.

Synchronous counters operate faster because all flip-flops are triggered simultaneously.

The primary advantage of MSI circuits is reduced size and cost due to the integration of multiple functions on a single chip.

TTL (Transistor-Transistor Logic) is known for its high speed and moderate power consumption compared to other logic families.

The primary difference is that FPGAs typically have more logic resources and are better suited for complex designs compared to CPLDs.

BJTs generally consume more power than MOSFETs, making them less favorable for low-power applications in integrated circuits.

In monostable mode, the 555 timer generates a single pulse of a specific duration when triggered.