A NAND gate outputs low (0) only when both inputs are high (1); otherwise, it outputs high (1).

A 2-input XOR gate outputs 0 when both inputs are the same (either both 0 or both 1).

A NAND gate outputs high (1) when at least one input is low; thus, it outputs 1 when both inputs are low.

An Ex-NOR gate outputs 0 when both inputs are different.

The AND operation outputs true only if both A and B are true; otherwise, it outputs false.

The Ex-OR gate outputs 1 when the inputs are different (A=1, B=0).

An OR gate outputs 0 only when both inputs are 0.

The two's complement of 0110 is 1010.

The common emitter configuration is typically used for BJTs as switches due to its high gain and ability to control large currents.

The common source configuration is commonly used for small-signal analysis of FETs due to its amplification properties.

The common emitter configuration is widely used for signal amplification due to its high gain.

The common emitter configuration is commonly used for switching applications due to its high gain and ability to drive loads.

Operational amplifiers can be configured in inverting, non-inverting, and differential modes for voltage amplification.

The typical current gain (beta) for BJTs ranges from 10 to 100.

The duty cycle in astable mode varies based on the resistor and capacitor values used in the circuit.

When both resistors in an astable 555 timer are equal, the duty cycle is typically 50%.

The typical frequency of household AC in the United States is 60 Hz.

The typical input impedance of a BJT in common-emitter configuration is medium, allowing for reasonable signal coupling.

The typical input impedance of a BJT in the common-emitter configuration is medium.

CMOS gates have a high input impedance, which allows them to draw very little current from the input signal.

FETs typically have a much higher input impedance compared to BJTs, making them suitable for high-impedance applications.

An ideal op-amp has infinite input impedance, which prevents loading the input signal.

CMOS logic gates have a high input impedance, which allows them to draw very little current.

An ideal op-amp has an open-loop gain that approaches infinity.

The typical open-loop gain of an operational amplifier can be around 100,000 or more.

FETs in the saturation region exhibit high output impedance, making them suitable for voltage amplification.

An ideal operational amplifier has infinite output impedance, allowing it to drive loads without affecting the output voltage.

A 2-to-4 line decoder typically has 4 outputs, with one output active based on the 2-bit input.

In TTL logic families, the typical output voltage level for a logic high is around 5V.

The output voltage level of a 555 timer in high state is typically equal to the supply voltage (Vcc).